1. Field of the Invention
The present invention relates to a voltage controlled oscillation circuit in which an oscillation frequency is controlled in accordance with an external analog voltage. A voltage controlled oscillator including this type of a voltage controlled oscillation circuit is widely used as a clock oscillator for an analog phase locked loop (PLL) oscillator.
The analog PLL oscillator has the function of multiplying a clock frequency and adjusting a skew of a rising or falling edge of a clock in an LSI, and has recently shown a tendency to provide a circuit (a so-called macro circuit) which is essential for realizing a high-speed LSI (large-scale integrated circuit) having a large size.
The present invention concerns a voltage controlled oscillation circuit making up an analog PLL oscillator as mentioned above, in which oscillation can be accomplished in a stable fashion regardless of the input voltage level.
2. Description of the Related Art
For facilitating an understanding of the problem of the conventional voltage controlled oscillation circuit, an exemplary configuration and the operation of a conventional voltage controlled oscillation circuit will be described below with reference to FIGS. 1 and 2 that will be described in xe2x80x9cBrief Description of the Drawingsxe2x80x9d.
In FIG. 1, a ring oscillation circuit including three inverters in series is shown as an example of a representative conventional voltage controlled oscillation circuit.
In a conventional voltage controlled oscillation circuit 400 shown in FIG. 1, three inverters i.e., first to third inverters 100-1 to 100-3, are connected in series each having the function of an inversion circuit element for inverting an output signal with respect to an input signal. An output terminal OUT of the third-stage inverter 100-3 is connected to the input terminal IN of the first-stage inverter 100-1. Thus, a ring circuit is configured in which an oscillation is caused by feeding back the output signal of the third-stage inverter to an input side of the first-stage inverter.
Further, in FIG. 1, first to third transfer gates 200-1 to 200-3 having the function of a frequency variable control unit for changing an oscillation frequency of the ring oscillation circuit are interposed between the respective adjacent inverters (including the pair of the third-stage inverter and the first-stage inverter) in the ring oscillation circuit. Each of the first to third transfer gates 200-1 to 200-3 includes a p-MOS transistor (p-channel type MOS transistor) and n-MOS transistor (n-channel type MOS transistor) connected in parallel. The gate of the p-MOS transistor and the gate of the n-MOS transistor are supplied with two types of analog control voltages Dc and XDc (the control voltages Dc and XDc are in an inverted relationship with respect to each other) through two control voltage terminals from an external source, thereby making it possible to change the oscillation frequency of the ring oscillation circuit. In other words, in accordance with the control voltages DC and XDc applied to the gate of the p-MOS transistor and the gate of the n-MOS transistor, respectively, the impedances of the first to third transfer gates 200-1 to 200-3 are changed, and thereby the same state is realized as if the input side of the first to third inverters 100-1 to 100-3 is connected with equivalent variable resistors Rc1, Rc2 and Rc3, respectively, so that the oscillation frequency of the ring oscillation circuit is made variable.
In the conventional voltage controlled oscillation circuit shown in FIG. 1, the impedance of the first to third transfer gates 200-1 to 200-3 inserted between the inversion circuit elements may increase, in the case in which the input voltage of the inversion circuit elements in the oscillation circuit is reduced to 0 V, or rises to a power source voltage level, at the time of switching on power, or when the reference clock is suspended for a long time at the time of using the PLL oscillator. More specifically, in the case in which the control voltages Dc and XDc applied to the gate of the p-MOS transistor and the n-MOS transistor of each transfer gate reach the voltage level near the power source voltage and the voltage level of 0 V, respectively, as shown in a graph of FIG. 8 described later, the resistance value of the equivalent variable resistors Rc1, Rc2 and Rc3 generated by the transfer gates considerably increases, typically, to the order of a giga ohm (Gxcexa9;109xcexa9).
Let the transfer gates be in a high impedance state, as described above. As is apparent from the graph of FIG. 2 showing a temporal change of the voltages of nodes #1, #2 and #3 (FIG. 1) in the conventional voltage controlled oscillation circuit, oscillation lasts only for a small length of time (say, approximately 500 xcexcsec) when a power source voltage rises sharply at the time of switching on power. The oscillation amplitude gradually decreases, however, and finally dies out. In other words, as long as each transfer gate remains at high impedance, the voltage level at each of the nodes #1, #2 and #3 positioned between the adjacent inverters cannot be inverted, and they therefore settle to an intermediate potential (say, 1.4 to 1.5 V). Even when power is switched on and rises, therefore, the oscillation fails to begin in the oscillation circuit unless the input voltage reaches a predetermined level.
The resulting problem of the conventional voltage controlled oscillation circuit is that it takes a long time before the oscillation starts in the oscillation circuit. Further, this problem leads to the adverse effect of lengthening the time (i.e., the lockup time) before a predetermined oscillation frequency is obtained in the analog PLL oscillator using the voltage controlled oscillation circuit of the above-mentioned type.
The present invention has been developed in view of the above-mentioned problem, and the object thereof is to provide a voltage controlled oscillation circuit in which a stable oscillation is guaranteed even in the case in which the input voltage level is reduced to 0 V or reaches the power source voltage level at the time of switching on power or using the PLL oscillator.
In order to solve the above-mentioned problem, according to the present invention, there is provided a voltage controlled oscillation circuit comprising an odd number of inversion circuit elements connected in series for inverting the output signals thereof with respect to the input signals thereto and having an output side of the last-stage inversion circuit element connected to an input side of the first-stage inversion circuit element thereby to cause an oscillation, a plurality of oscillation frequency variable control units inserted between the adjacent ones of the inversion circuit elements, respectively, for changing an oscillation frequency related to the oscillation in accordance with an external voltage, and a plurality of fixed resistor circuit elements each having a predetermined fixed resistance value connected in parallel with the oscillation frequency variable control units, respectively.
According to one preferred aspect of the invention, there is provided a voltage controlled oscillation circuit, in which each of the oscillation frequency variable control units includes a variable resistor circuit element having a variable resistor of a resistance value changing with the external voltage and in which the oscillation frequency is determined based on the resistance value of the variable resistors.
According to another preferred aspect of the invention, there is provided a voltage controlled oscillation circuit, in which each of the fixed resistor circuit elements includes at least one fixed resistor.
According to still another preferred aspect of the invention, there is provided a voltage controlled oscillation circuit, in which each of the fixed resistor circuit elements includes at least one MOS transistor, and in which a resistor having the above-mentioned fixed resistance value is realized by applying a predetermined voltage to the MOS transistor.
According to still another preferred aspect of the invention, there is provided a voltage controlled oscillation circuit, in which each of the fixed resistor circuit elements includes at least one polycrystalline silicon element formed on a substrate or the like, by which a resistor having the above-mentioned fixed resistance value can be realized.
According to still another preferred aspect of the invention, there is provided a voltage controlled oscillation circuit, in which each of the fixed resistor circuit elements includes at least one diffusion layer embedded in a substrate or the like, by which a resistor having the above-mentioned fixed resistance value can be realized.
Further, preferably, there is provided a voltage controlled oscillation circuit, in which an odd number of inversion circuit elements for inverting output signals thereof with respect to input signals thereof are connected in series with each other, in which an output side of the last-stage inversion circuit element is connected to an input side of the first-stage inversion circuit element for causing an oscillation, in which a plurality of transfer gates each including a MOS transistor are inserted between the respective adjacent inversion circuit elements, respectively, for changing an oscillation frequency related to the oscillation in accordance with an external voltage, and in which the MOS transistor is a depletion type transistor so that the oscillation is maintained by keeping the MOS transistor turned on even when the gate voltage is not applied to the MOS transistor.
Further, preferably, there is provided a voltage controlled oscillation circuit, in which an odd number of inversion circuit elements for inverting output signals thereof with respect to input signals thereof are connected in series to each other, in which an output side of the last-stage inversion circuit element is connected to an input side of the first-stage inversion circuit element thereby to cause an oscillation, in which a plurality of transfer gates each including a MOS transistor for changing an oscillation frequency related to the oscillation in accordance with an external voltage are inserted between adjacent ones of the inversion circuit elements, respectively, and in which the MOS transistor is a transistor of a short channel type having a short channel length so as to maintain the oscillation by keeping the MOS transistor turned on even when the gate voltage is not applied to the MOS transistor.
In a voltage controlled oscillation circuit according to the present invention, a plurality of fixed resistor circuit elements each having a predetermined fixed resistance value are inserted between a plurality of the inversion circuit elements in parallel with a plurality of transfer gates including a plurality of variable resistor circuit elements for changing the oscillation frequency. In the case in which power is switched on or the oscillation is temporarily suspended, and when the power input voltage level is reduced to 0 V or reaches the power source voltage level resulting in an increased impedance of each transfer gate, the combined resistance on the input side of each inversion circuit element is controlled by the fixed resistance value of the fixed resistor circuit elements. Consequently, even in the case in which the input voltage level is reduced to 0 V or reaches the power source voltage level, a stable oscillation is maintained in the oscillation circuit.